【笔记】AMD64体系常用到的数据结构

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#pragma pack(1)

////////////////////////////
//    Control Register    //
////////////////////////////

struct Control_Register_0
{
        unsigned PE : 1;
        unsigned MP : 1;
        unsigned EM : 1;
        unsigned TS : 1;
        unsigned ET : 1;
        unsigned NE : 1;
        unsigned Reserved0 : 10;

        unsigned WP : 1;
        unsigned Reserved1 : 1;
        unsigned AM : 1;
        unsigned Reserved2 : 10;
        unsigned NW : 1;
        unsigned CD : 1;
        unsigned PG : 1;
};

struct Control_Register_4
{
        unsigned VME : 1;
        unsigned PVI : 1;
        unsigned TSD : 1;
        unsigned DE : 1;
        unsigned PSE : 1;
        unsigned PAE : 1;
        unsigned MCE : 1;
        unsigned PGE : 1;

        unsigned PCE : 1;
        unsigned OSFXSR : 1;
        unsigned OSXMMEXCPT : 1;
        unsigned UMIP : 1;
        unsigned Reserved0 : 1;
        unsigned VMXE : 1;
        unsigned SMXE : 1;
        unsigned Reserved1 : 1;

        unsigned FSGSBASE : 1;
        unsigned PCIDE : 1;
        unsigned OSXSAVE : 1;
        unsigned Reserved2 : 1;
        unsigned SMEP : 1;
        unsigned SMAP : 1;
        unsigned PKE : 1;

        unsigned Reserved3 : 9;
};

struct EFLAGS_Register
{
        unsigned CF : 1;
        unsigned Reserved0 : 1;
        unsigned PF : 1;
        unsigned Reserved1 : 1;
        unsigned AF : 1;
        unsigned Reserved2 : 1;
        unsigned ZF : 1;
        unsigned SF : 1;

        unsigned TF : 1;
        unsigned IF : 1;
        unsigned DF : 1;
        unsigned OF : 1;
        unsigned IOPL : 2;
        unsigned NT : 1;
        unsigned Reserved3 : 1;

        unsigned RF : 1;
        unsigned VM : 1;
        unsigned AC : 1;
        unsigned VIF : 1;
        unsigned VIP : 1;
        unsigned ID : 1;
        unsigned Reserved4 : 10;
};

////////////////////////
//    Segmentation    //
////////////////////////

struct Segment_Selector
{
        unsigned short RPL : 2;
        unsigned short TI : 1;
        unsigned short Index : 13;
};

struct Descriptor_Table_Register
{
        void* BaseAddress;
        unsigned short Limit;
};

struct Segment_Descriptor
{
        unsigned Limit0 : 16;
        unsigned Base0 : 16;
        unsigned Base1 : 8;

        unsigned Type : 4;
        unsigned S : 1;
        unsigned DPL : 2;
        unsigned P : 1;

        unsigned Limit1 : 4;

        unsigned AVL : 1;
        unsigned L : 1;
        unsigned D_B : 1;
        unsigned G : 1;

        unsigned Base2 : 8;
};

struct Gate_Descriptors
{
        unsigned short Offset0;
        struct Segment_Selector Selector;

        unsigned IST : 2;
        unsigned Reserved : 6;

        unsigned Type : 4;
        unsigned S : 1;
        unsigned DPL : 2;
        unsigned P : 1;

        unsigned Offset1 : 16;
};

struct Gate_Descriptors_64
{
        struct Gate_Descriptors Gate;
        unsigned Offset2;
        unsigned Reserved;
};

//////////////////
//    Paging    //
//////////////////

// Intel Table 4-5.
// AMD Figure 5-5.
struct Page_Directory_Entry
{
        unsigned P : 1;
        unsigned R_W : 1;
        unsigned U_S : 1;
        unsigned PWT : 1;

        unsigned PCD : 1;
        unsigned A : 1;
        unsigned Ignored0 : 1;
        unsigned PS : 1;

        unsigned Ignored1 : 4;

        unsigned PageTableBaseAddress : 20;
};

// Intel Table 4-6.
// AMD Figure 5-6.
struct Page_Table_Entry
{
        unsigned P : 1;
        unsigned R_W : 1;
        unsigned U_S : 1;
        unsigned PWT : 1;

        unsigned PCD : 1;
        unsigned A : 1;
        unsigned D : 1;
        unsigned PAT : 1;

        unsigned G : 1;
        unsigned Ignored : 3;

        unsigned PhysicalPageBaseAddress : 20;
};

// Physical-Address Extensions

// Intel Table 4-8.
// AMD Figure 5-10.
struct Page_Directory_Pointer_Entry
{
        unsigned P : 1;
        unsigned Reserved0 : 2;
        unsigned PWT : 1;

        unsigned PCD : 1;
        unsigned Reserved1 : 4;
        unsigned Ignored : 3;

        unsigned PageTableBaseAddress0 : 20;

        unsigned PageTableBaseAddress1 : 20;
        unsigned Reserved2 : 12;
};

// Intel Table 4-10.
// AMD Figure 5-11.
struct Page_Directory_Entry_PAE
{
        struct Page_Directory_Entry PageDirectoryEntry;
        unsigned PageTableBaseAddress : 20;
        unsigned Reserved : 11;
        unsigned NX : 1;
};

// Intel Table 4-11.
// AMD Figure 5-12.
struct Page_Table_Entry_PAE
{
        struct Page_Table_Entry PageTableEntry;
        unsigned PhysicalPageBaseAddress : 20;
        unsigned Reserved : 11;
        unsigned NX : 1;
};